The creation of low-power circuits capable of speech recognition and speaker verification will enable spoken interaction on a wide variety of devices in the era of Internet of Things.

In collaboration with Prof. Anantha Chandrakasan of the Microsystems Technology Laboratory, we are developing speech processing technologies for applications such as speech recognition and speaker verification that can be implemented in low-power circuits.

Compared to performing speech recognition and speaker verification on software, dedicated hardware design can fully leverage the computation resources on circuit, thus having the advantage of generating real-time results while consuming less power.

We explore several power-reduction techniques in both algorithm and architecture level in our circuit design. The energy-efficient design enables us to perform high computational complexity speech processing tasks on many resource-limited devices.

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