Devadas Honored at Design Automation Conference
June 10, 2013
Professor Srini Devadas has been honored for his significant contributions to the Design Automation Conference (DAC) and his impact on the course of DAC’s history.
Devadas, the Edwin Sibley Webster Professor of Electrical Engineering and Computer Science (EECS) at MIT and a principal investigator in the Computer Science and Artificial Intelligence Laboratory (CSAIL), was recognized as a DAC Top 10 Cited Author, “for being among the top ten most cited DAC authors in DAC’s 50 year history.” Devadas was also awarded the Best-Paper Hat Trick Award “for winning the DAC best paper award three times – the most in DAC’s 50 year history.” Among his most cited works is “Physical unclonable functions for device authentication and secret key generation,” published in the Proceedings of the 44th annual DAC in 2007. This work, which led to development of a low-cost mechanism for authentication of silicon chips, formed the basis for the company Verayo, founded in 2005.
Devadas has been a faculty member at MIT since earning his PhD from University of California at Berkeley in 1988. His broad range of research interests and projects include computer architecture, computer security, VLSI design, computer-aided design, hardware validation, network router hardware, computer security and computational biology. Devadas developed Aegis, a secure hardware processor that uses PUFs to generate secret keys from chip fabrication variations. As part of Project Qmulus at CSAIL, Devadas and his research group have worked on trusted virtual computation and secure virtual storage. His group recently designed and implemented the Execution Migration Machine, a 110-core shared memory processor that uses fast hardware-level thread migration to significantly reduce on-chip network traffic. He is also a contributing member of bigdata@CSAIL.
DAC also recognized Devadas for winning the DAC best paper award three times, the most in DAC’s 50-year history, and awarded him membership in the DAC 30 Club for publishing 30 papers at DAC. Over the years, Devadas has pioneered work in a number of areas related to CAD, security and computer architecture. His early award-winning work involved developing a symbolic simulation method for analyzing the average and worst-case power estimation of combinational and sequential logic; this was among the first efficient and accurate power estimation methods developed.
For more on Devadas’ work, please visit: http://www.csail.mit.edu/user/792.