Approximate Techniques for Performance and Power Modeling/Prediction
Speaker
Professor Lizy Kurian John
University of Texas, Austin
Host
Professor Saman Amarasinghe
MIT - CSAIL
Abstract:
Modern high performance processors contain billions of transistors, and are very complex. The designs of these processors contain millions of lines of VHDL or Verilog code. It is extremely difficult to perform pre-silicon estimation of performance and power of such designs for real-world workloads. Performance models that model each cycle in a detailed fashion and power models that estimate the power consumption of each functional unit/hardware component from first principles are slow and tedious to build. Even if such models can be built, many of the application-based benchmarks contain trillions of instructions executing in a multitude of software layers, back-end databases, third-party libraries, etc. and it is nearly impossible to simulate them on RTL or early performance models. Hence it might be interesting to create approximate models that are fast and reasonably accurate. In this talk, I’ll present some examples of approximate performance and power modeling using machine learning and statistical techniques.
In addition to examples on power model calibration, and cross-platform performance/power prediction, creation of benchmark proxies and automatic creation of max power stressmarks will be presented. The proxy benchmark methodology is to characterize the original benchmark/application and to automatically create a program (a sequence of instructions) that can exert the machine in an equivalent manner. The synthesized clones do not perform the functionality of the original benchmark, however exhibit equivalent characteristics as far as performance and power are concerned. The proxy methodology can also be combined with machine learning to create max power stressmarks in an automatic fashion. Ongoing research to improving the fidelity of proxies and efforts to capture the time-varying behavior of original programs will also be described.
Bio:
Lizy Kurian John is B. N. Gafford Professor in the Electrical and Computer Engineering at UT Austin. She received her Ph. D in Computer Engineering from the Pennsylvania State University. Her research interests include workload characterization, performance evaluation, architectures with emerging memory technologies such as die-stacked DRAM, and high performance processor architectures for emerging workloads. She is recipient of NSF CAREER award, UT Austin Engineering Foundation Faculty Award, Halliburton, Brown and Root Engineering Foundation Young Faculty Award 2001, University of Texas Alumni Association (Texas Exes) Teaching Award 2004, The Pennsylvania State University Outstanding Engineering Alumnus 2011, etc. She has coauthored a book on Digital Systems Design using VHDL (Cengage Publishers, 2007, 2017), a book on Digital Systems Design using Verilog (Cengage Publishers, 2014) and has edited 4 books including a book on Computer Performance Evaluation and Benchmarking. She is in ISCA and HPCA Hall of Fame, holds 10 US patents and is a Fellow of IEEE.
Modern high performance processors contain billions of transistors, and are very complex. The designs of these processors contain millions of lines of VHDL or Verilog code. It is extremely difficult to perform pre-silicon estimation of performance and power of such designs for real-world workloads. Performance models that model each cycle in a detailed fashion and power models that estimate the power consumption of each functional unit/hardware component from first principles are slow and tedious to build. Even if such models can be built, many of the application-based benchmarks contain trillions of instructions executing in a multitude of software layers, back-end databases, third-party libraries, etc. and it is nearly impossible to simulate them on RTL or early performance models. Hence it might be interesting to create approximate models that are fast and reasonably accurate. In this talk, I’ll present some examples of approximate performance and power modeling using machine learning and statistical techniques.
In addition to examples on power model calibration, and cross-platform performance/power prediction, creation of benchmark proxies and automatic creation of max power stressmarks will be presented. The proxy benchmark methodology is to characterize the original benchmark/application and to automatically create a program (a sequence of instructions) that can exert the machine in an equivalent manner. The synthesized clones do not perform the functionality of the original benchmark, however exhibit equivalent characteristics as far as performance and power are concerned. The proxy methodology can also be combined with machine learning to create max power stressmarks in an automatic fashion. Ongoing research to improving the fidelity of proxies and efforts to capture the time-varying behavior of original programs will also be described.
Bio:
Lizy Kurian John is B. N. Gafford Professor in the Electrical and Computer Engineering at UT Austin. She received her Ph. D in Computer Engineering from the Pennsylvania State University. Her research interests include workload characterization, performance evaluation, architectures with emerging memory technologies such as die-stacked DRAM, and high performance processor architectures for emerging workloads. She is recipient of NSF CAREER award, UT Austin Engineering Foundation Faculty Award, Halliburton, Brown and Root Engineering Foundation Young Faculty Award 2001, University of Texas Alumni Association (Texas Exes) Teaching Award 2004, The Pennsylvania State University Outstanding Engineering Alumnus 2011, etc. She has coauthored a book on Digital Systems Design using VHDL (Cengage Publishers, 2007, 2017), a book on Digital Systems Design using Verilog (Cengage Publishers, 2014) and has edited 4 books including a book on Computer Performance Evaluation and Benchmarking. She is in ISCA and HPCA Hall of Fame, holds 10 US patents and is a Fellow of IEEE.