Biography
Anant Agarwal holds a Ph.D. (1987) and an MS in Electrical Engineering from Stanford University. He got his bachelor's degree in Electrical Engineering from IIT Madras (1982). He is currently a professor of Electrical Engineering and Computer Science at MIT, where his teaching and research interests include VLSI, computer architecture, compilation, and software systems. He led a group that developed the MIT Alewife, a scalable shared-memory multiprocessor. He also led the VirtualWires project at MIT and was founder of Virtual Machine Works, Inc., which took the VirtualWires logic emulation technology to market. He currently leads the Raw project in the Computer Science and Artificial Intelligence Laboratory. He is also founder of InCert Software Corporation, which is applying a software agent technology to enterprise applications management.
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Publications
- A. Agarwal, M. Horowitz, and John Hennessy. "An Analytical Cache Model." ACM Transactions on Computer Systems, 7:2, May 1989, pp. 184-215.
- A. Agarwal, J. Babb, D. Chaiken, G.D. Souza, K. Johnson, D. Kranz, J. Kubiatowicz, B.H. Lim, G. Maa, K. MacKenzie, D. Nussbaum, M. Parkin, and D. Yeung. "Sparcle: Today's micro for Tomorrow's Multiprocessor." In proceedings of the HOTCHIPS Conference, August 1992, and also in IEEE Micro 13:3, June 1993, PP.48-61.
- J. Babb, R. Tessier, and A. Agarwal. "Virtual Wires: Overcoming Pin Limitations in FPGA-Based Logic Emulators." In proceedings of the First IEEE Workshop on FPGAs for Custom Computing Machines (FCCM"93). April 1993, pp 142-151.
- A. Agarwal, R. Bianchini, D. Chaiken, K. Johnson, D. Kranz, J. Kubiatowicz, B. H. LIm, K. MacKenzie, and D. Yeung. " The MIT Alewife Machine: Architecture and Performance." In proceedings of the 22nd Annual Internationsl Symposium on Computer Architecture (ISCA 1995), June 1995, pp 2-13
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